AMD Strikes Back - Zen 5 CPU Architecture Changes & Chipset Differences (X870E vs. X870, B850, B840)

**Upcoming Ryzen Motherboards: Key Features and Requirements**

We're excited to dive into the world of upcoming Ryzen motherboards, particularly those that will support the new x670 and x870 chipsets. As we discussed earlier, these motherboards will be a crucial part of our review process, and we'll be putting them through their paces soon.

One key thing to pay attention to when choosing your motherboard is the CPU. This is one of the most critical components in your system, and it's essential to choose a board that can handle your chosen processor. The new x670 chipset will support Ryzen 7000 series CPUs, while the x870 chipset will also be compatible with these processors.

In addition to the CPU, the chipset is another crucial component to consider when selecting your motherboard. The chipset determines the number of PCIe lanes available on the board, which in turn affects the type and number of graphics cards you can use. Both the x670 and x870 chipsets will support PCI Gen 5 graphics, but the x870 will also offer a faster storage option with NVMe.

**Table of Requirements**

To help simplify things, AMD has provided a table that outlines the key features and requirements for these new motherboards. This table shows that Ryzen CPUs will be compatible with up to 44 PCIe lanes on the x670 and x870 chipsets, which is a significant increase over previous generations. The x670 chipset also supports up to 24 PCIe Gen 5 lanes.

In contrast, the B850 chipset drops some of these features, such as PCI Gen 4 graphics support, but still offers fast storage options with NVMe. However, it's worth noting that this chipset is considered low-end compared to the x670 and x870 offerings.

**Chipset Details**

One key difference between the x670 and x870 chipsets is the use of a single or dual chipset die. The x670 chipset uses a single die, while the x870 chipset will feature two dies. This design allows for more flexibility in terms of PCIe lane configuration, with support for 16 PCIe Gen 5 lanes or eight lanes split into two configurations.

The B850 and B840 chipsets, on the other hand, use a single die and are considered lower-end options compared to their x670 and x870 counterparts. These chipsets drop some key features, such as CPU overclocking and fast storage options with NVMe.

**Availability and Pricing**

As we approach launch time, we're still unsure when exact availability dates will be confirmed for these motherboards. However, it's clear that AMD is focusing on offering high-performance components that can handle the demands of modern gaming and content creation.

In terms of pricing, it's worth noting that some board partners may offer more competitive prices than others, so it's essential to shop around and compare prices before making a purchase.

**Availability of Features**

One feature that has generated significant interest is the availability of curve shaper, which allows for advanced graphics and color calibration. While we're not yet clear on whether this feature will be added retroactively to existing x67e boards or not, it's possible that AMD may offer some form of curve shaper support in the future.

**Conclusion**

The upcoming Ryzen motherboards offer a range of exciting features and options for enthusiasts and content creators alike. By understanding the key differences between these chipsets and their requirements, you can make an informed decision when selecting your next motherboard.

We'll be reviewing some of these motherboards in the coming weeks and months, so stay tuned for more information on their performance, features, and availability. In the meantime, we hope this article has provided a comprehensive overview of what to expect from these new chipsets and how they will shape the future of gaming and content creation.

**Additional Resources**

For more information on AMD's upcoming Ryzen motherboards, be sure to check out our interview with Mike Clark, where he shares his insights on the company's plans for the 7000 series. Additionally, you can visit Gamers Nexus' website or Patreon page to support our content creation and travel expenses.

By supporting us directly, you'll be helping us bring high-quality content to our community and fund our own travels to attend industry events and cover the latest developments in PC hardware.

"WEBVTTKind: captionsLanguage: enmdz 5 CVS will be launching on July 31st so this is a dedicated News segment with some architectural information a uh differences in comparison section on the chipsets that's x870 x870 b850 b840 against the prior chipsets we covered that during the Cy Tex announcement but now we have some more info so that's what we're going over here today uh amd's new features include on thefly memory tuning some memory changes from within Windows being supported without reboot now so that's kind of cool there's a new curve shaper we talked about that in our video from a couple days ago with Bill and omit going over the overclocking so you can learn about curve shaper in that one that builds on top of curve Optimizer there's the new chipsets there's the Zen 5 architecture itself and we'll cover the rest of the news for AMD Zen 5 lineup as we know it right now so all of this comes from a press conference that AMD held in Los Angeles as always we paid for all of our own flights uh travel Hotel housing staff obviously things like that so we flew out there on our own dollar thank you for the support and us to do that and collected all this information we put it together for you and then the reviews are coming up closer to that July 31st date uh but for now at least we can get into some of the architectural differences and some of the expectations for performance that AMD has set with its first party Benchmark so let's get into it before that this video is brought to you by thermal R and the Frozen prism 360 liquid cooler thermal R's Frozen prism is one of the most affordable liquid coolers on the market and is able to achieve competitive results with a high cold blate convexity that applies pressure centrally to the Silicon area based on our testing this this works on both AMD and Intel we previously benchmarked the Frozen prism and found that it's overall competitive for its price point the cooler comes in a few color variations it has a blackout option and an RGB option and it's the cheapest liquid cooler we've tested anytime recently that still hits performance markers learn more at the link in the description below so we'll get right into the quick facts first uh some of this was already covered at amd's compy Tex announcement but a lot of it's new information unfortunately the first thing everyone wants is price we don't have that yet that'll be closer to the July 3 first date now amd's ryzen 9000 Series Desktop uh CPUs are code named Granite Ridge and these feature the zen5 architecture they are still in the am5 socket so the motherboards can be the same uh and then they are launching soon now the first image will be a recap of things we already knew so that's the The Core specs of the CPUs that are currently known then that'll be followed by the new information so it's a recap for you all this shows the lineup is fundamentally identical to the initial ryzen 7000 series CPUs the flag ship R9 950x which was the one we overclocked or rather watched Bill overclock in the recent video has 16 cores it advertises a 5.7 GHz Max boost 80 megabytes of cache 170 wat TDP down from that is the R9 9900x with 12 cores slightly lower boost and cash and a 120 watt TDP then there's the 9700x that has eight cores it's got a 5.5 GHz Max boost a smaller 40 megab of cache and that is due to it being a single CCD and then it has a 65 wat TDP and finally there's the 6 core 9600 X which holds up the bottom of the stack notably the tdps for the bottom three are down versus their prior Ry in 7,000 counterparts as a reminder TDP doesn't equate the actual power consumption uh it's not always consistent across the same companies we asked about that get to that in a second uh and it is definitely not consistent across vendors or even across sockets and these pvt or package powert tracking would be the more reliable gu post for sort of power comparison numbers so uh the TDP formula is TDP equals T case minus t ambient divided by uh heat SN fan Theta CA I think is what it is so uh that is important that all those things are the same for the comparison to be like to like we asked AMD yes they are all the same metrics so uh the numbers that go into that formula for ryzen 7000 and ryzen 9000 should be like for like comparable in other words meaning heat sink fan Theta CA thermal resistance is the same that's the key number that one particularly mattered AMD advertised that for Zen 5 it has improved the thermal resistance they say by 15% Improvement in the Zen 5 solution for what they say is a 7 Dee reduction at equivalent TDP so we asked amd's people uh what exactly does that mean what was tuned how to improve and the answer we got was The Tuning was largely to sensor placement and optimization of how the temperature is being read there have been some other improvements as well as a result of the AR architectural changes maybe some voltage stuff but ultimately it comes down to sensor placement so in any given CPU there are multiple thermal sensors AMD Zen CPUs have hundreds of sensors for different things across the chips and changing the placement of them means that strictly like for like it's not identical but what they're trying to do is improve the boosting Headroom by getting sensors out of areas where it may be leading to uh an unoptimized temperature reading that is for example jumping in Gate the Boost in or thermally limit maybe more accurate say the boosting earlier in the pipeline so they're trying to get away from that so that means the T die performance should look better at least and may allow better boosting all right getting into the architecture stuff so AMD gave the press a deeper dive into the changes for Zen 5 it's stating that Zen 5 is it's sort of seing it as a place to grow from for Zen 6 and Zen 7 here's uh the beginning of that presentation and what you're going to see is it really represents a huge leap forward and in fact it's going to be a pedestal that we're going to build upon the next several generations of Zen in this presentation AMD said that it redesigned key elements of the front end including fetch decode and dispatch this gives more instructions to the back end every clock tick as Zen 5 has wider execution pipelines to execute the instructions AMD says that efficiency increases from improved cash with more bandwidth and an expanded execution window which the company States is intended to avoid execution stalls moving into more detail and starting on the front end with Pip fetch Branch prediction is lower latency more accurate and with more predictions per cycle in Zen 5 according to AMD this all adds up to more throughput in the front end downstreams N5 has dual ported instruction cach and op cash while decreasing the latency and the also added a dual decode path next is dispatch and the execution engine Z5 features 8 wide dispatch and retire six alus with three multiplies and a more unified ALU scheduler there used to be a unique schedule for each of the alus we then went uh you know from the the fact that we had uh these wider uh execution pipelines knowing that when you have uh more uh instructions that you're handling you have to think about handling misses uh effectively and keeping the performance those execution pipelines again hardcore microarchitecture engineering am the also expanded Zen 5's execution window by it says 40% with up to 448 supported Ops which AMD says is a significant driver of more performance Zen 5 also has a larger 48 kiloby data cache up from 32 kiloby on Zen 4 and double the maximum bandwidth to the L1 cache and floating Point Unit and improved data prefetch when you grow caches like that what typically happens uh is you run a high risk of increasing the latency you you gow the cash that's normally going to happen uh but what uh we did in this case uh Team just did a phenomenal job and so they maintained actually that four cycle access uh that that we had had despite the growth the 50% growth in the data cache with Zen 5 we can now execute four loads per cycle the final key Improvement AMD made regarding data bandwidth is to data prefetching where AMD says the tuned algorithms give more stride pattern recognition next are the floating point and vector unit enhancements these include a full 512-bit data path six pipelines with two cycle latency floating ad and a larger number of floating Point instructions in flight at one time so I talked about that 520 52 bit uh data path this is more important than ever because when you think about it uh there's been no reduction in the kind of math hungry work clads of gaming of HPC of content creation uh you know when so when you think about those users of of the math unit uh none of them are are going away but AI uh with with its need is now becoming a workload everywhere AMD so far has done AVX 512 by double pumping a 256bit pipeline which made sure that the CPU wouldn't have to drop clocks while doing AVX 512 workloads with 5 AMD engineered away to support full frequency while running the physical data path at true 512-bit our understanding is that this is modular to the extent that the older double pump approach is still possible in some situations if they want to build it that way Zen 5 they say also lowers the latency of floating Point operations from three Cycles to two so we doubled the physical pipeline we lowered the latency we've increased the throughput and that combined with the load store improvements that I described really create uh a super optimized engine across those workloads I described AI HBC gaming content creation all these improvements bundled together result in what AMD claims as a 16% average geoman uplift in IPC versus zen4 with up to 35% they say for single core uplift in AES XTS encryption the breakdown of Zen 5's uplift consists of data bandwidth Fetch and Branch prediction execution retire and decode and op cach improvements in a more physical sense Zen 5 Moves to 4 nanometer and 3 nanometer process technology uh this should enhance they say the metal stack for higher performance and lower resistance there's a change there as well AMD also shared some first-party performance claims so as always we'll kind of we'll go over a couple of these just to set the expectation and know what we're benchmarking against in terms of validating marketing but we're not going to go through all of them uh it is first party the numbers should therefore not be looked at as full truth and uh just view this as a way to set the expectations we'll have our own review for launch okay so the first set of tests were performed with matched clocks AMD says between a 9950 X and 7700x claimed IPC uplift ranged from up to 10% in Far Cry 6 to 23% in blender geekbench 5.4 was even higher though that seems like a potential outlier we would have preferred if these were done with CPS that were more comparable so at least the same ccds if not the same actual core count they lock the clock so that helps but AMD is basically asking us to give the benefit of the doubt that there is no Advantage from a physical Hardware difference between them uh beyond the architecture so anyway amd's had some shy history recently with some of its marketing slides like the Zen refresh stuff that they showed at computex where they chose a lower-end GPU to do a CPU Benchmark comparison didn't really make any sense but anyway moving on to and these competitive t in it matched up the 12 core 9900x versus Intel's 14900 K AMD claims a 41% Improvement or advantage in handbreak 22% in Horizon zero Dawn and 4% in Borderlands 3 and the also compared it's 9700x to the 14700 K citing a 19% advantage in Pug's Photoshop Benchmark that's when we run in our review so we'll check that and game benchmarks that range between 4% and 31% in the 9700 X's favor then finally finally moving to the 9600 X AMD matched it against the 14600 K there's a massive 94% win and handbreak along with a group of other productivity and gaming wins now interestingly AMD compared to its former am4 King the 5800 X 3D AMD is probably having some trouble getting people to migrate off that platform with how good that CPU was AMD ran the 9700x versus the 8 x3d where it claims an average 12% faster geom me that would be a huge efficient win as well in theory but we'll need to test it look at the power draw at the performance at the end of the architecture day discussion Andy had four of its fellows they're called on stage if you're not aware fellow is a common title in the industry it's reserved generally for very high ranking either engineer or management track people at companies in this instance uh this was the design and engineering team so the four Engineers included Mike Clark who's the Chief Architect we actually have a separate interview with him coming up soon uh he is regarded as they call him quote the father of Zen he has another nickname as well that we'll talk about in that interview and uh he is effectively the originator Will Harris is a platform engineer he knows the chipset in the socket mahash subon is a silicon design engineer and then Joe Macker is the Computing graphic CTO it was a generally technical if a bit top level discussion at times one of the early questions had to do with the fact that AMD is uh rolling out a heterogenous core in some of its products and so this was the S so discussion a lot of this stuff but there was a funny slip or maybe not in this section and see if you catch it mahash you know when we look at our competition Intel you know they have a performance core an economy core definitely some stifled laughs in the audience for that one I looked at vitalian I was like he did he say economy an economy core that's interesting uh anyway Intel calls it the efficient core but economy has kind of a different meaning behind it now uh here's another quote from AMD um you know we have heterogenous cores also our philosophy is different and how we approached desktop or mobile maybe you could you know dive in a little bit there and explain you know why two companies that are aiming at the same Market approach things just so differently it really is microarchitecture exact uh Isa exact an IPC exact module of the cach size it attaches to so the heterogenity if you will is really around the voltage frequency response so giving up some of that Peak um frequency Peak Performance and get some of that back in area and efficiency so um that's what the compact core does for us the the desktop user demands performance low latency and um throughput for every task they want to do so they are better served with a homogeneous you know classic core with a better um performance if you will on a voltage frequency response if you will Dynamic um and on on the mobile side even though they're not that far behind and they're computer requirements they care a lot about power efficiency and that's where the compact core kind of fits right in a right mix of of uh you know the classic and the compact course delivers that scalability in performance without compromising on the on the power efficiency amd's Macker added that since amd's compact cores are in essence the same as its regular cores it makes things easier from an OS or a software and scheduling perspective the corner cases that you experience when you got cores that are very separate in their in their attributes just you know confound the user Make That user experience more difficult make the OS Partners have a more difficult life in some ways interesting words from the company that shipped the 7950 x3d and the 79 100 x3d where these are CPUs with different performance characteristics that have uh ccds where they've got one with stacked vcash and lower frequency the other one without the cache but higher frequency there are some scheduling challenges there and those CPUs opened up a whole can of worms that in order to get the best performance in all circumstances they do require special drivers and even a little bit of user knowledge and intervention at setup um that we would classify as confounding so interesting choice of words they are not completely free from having some of the same considerations for users the big thing is as long as it's all communicated well so it matters uh most and then of course on the OS side all the scheduling does need to be taken care of Intel has struggled with that so fair point to AMD it's just they have also had some of those struggles in the past all right moving on MRE addressed Will Harris and brought up the am5 platform socket socket longevity and uh said that AMD intends for am5 to last up to seven years and they said four generations of CPU cores AMD later emailed us and said they did not intend to say four generations uh they intended to instead just give the the year marker and that was it so we don't know exactly what that means but it was a a misspeak in some capacity we'll see how that takes out in a few years I guess Harris responded saying this and so one of the first things that we do as we're uh designing a new infrastructure such as am4 am5 is we kind of tie it to a a major interface that's transitioning so uh in general is usually memory for example uh so am4 was tied with ddr4 and am5 was tied with ddr5 like you said we want that longevity so then we do things like uh making sure that we have sufficient interfaces to go uh for several Generations we we make sure that we've got the signal Integrity isolation on the pins on the package so that we can get a few speed bumps and improvement over time on like things like memory speeds or PCI Express speeds for example Harris also said that am the evaluat industry Trend standards committees thirdparty vendors to see where the market heading long term I asked uh Will Harris a little later in the event about socket longevity and the types of tradeoffs that might be made for something that is longer lasting and one of the key areas that Harris brought up actually a couple of them were one trying to align with Technologies like the the most recent DDR generation so five in this case uh aligning for pcie generations to try and catch those as they're new because they're going to be supported for a long life and making sure the pin count is appropriate so that AMD is able to work with all the pins it might want for such a a long lifespan other downsides would be if they want to do a massive change of any kind they're kind of restricted to the socket and the chipsets they've created and need to stick with it so anyway Mahesh from AMD jumped in and said that the generational gains in the same die area uh with them slowing down AMD has had to add die size in order to get more substantial gains in IPC and total performance so if the dieses get larger they still need to fit on the same physical package and that's a difficult challenge across multiple Generations you know the team has to dive in at the device physics level right the process technology as we shrink it you know voltages want to come down but the platform has to stay consistent and as AMD does uh they did take the opportunity to get in another shot at Intel fa you don't have to go change your motherboard every other generation like uh some other folks do do fair enough on that one AMD has done well am4 definitely has earned its legendary status for how long it's been relevant in getting new CPUs as long as AMD doesn't start doing the same thing as Intel at some point then that's a fair comment but we will remember that so if that ever changes AMD I'm going to dig this up even if it's in like 10 years from now play it back and be like hey remember that time just some encouragement to keep doing the right thing the conversation turned towards simultaneous multi-threading or smt addressing Intel leaving behind hyperthreading on the upcoming pees in lunar Lake I think as we talked about heterogen earlier you know with Intel having two core types one with smt and one without I can definitely see how that would be really hard to manage for software so I can't really comment more on on their design choices uh but that seems like an obvious one that that sticks out now again AMD 7950 x3d is staring us right in the face with some similar scheduling challenges but Clark continued addressing the actual topic at hand for us uh I mean smt is what is the best per per watt per area feature that we have and you know we've been implementation does matter too so you have to do it in a very smart way just like all the microarchitectural features you know Mark rolled out yesterday and so for us you know smts about a 5 to 10% area hit versus you know workload improvements that go from 20 to 50% Clark stated that smt doesn't work in every scenario and that if a workload is bandwidth intensive having more cores won't help more than having smt and you makes some processors with smt off and it allows the end user to of course turn it off they also briefly discussed the future Zen 6 and 7 CPUs but it was very limited mostly to the fact that am's making them and they also talked about how they view Zen 5 as sort of the launching point in a similar way to Zen one so it's almost like a reset for the platform for the architectures to Common 6 and 7 for the chipset comparison and differences we'll keep this as simple as possible cuz there's going be a lot of motherboards out there you can choose from as these Generations pile up so this will give you some tables to show the differences uh there are going to be four new sets in the immediate future there's x870 that's going to be a two die solution there's x870 b850 and b840 now the important thing to remember here for chipsets is that the chipset drives a lot of the io on the board but the CPU also has its own Lanes so the CPU has CPU Lanes other types of IO lanes that are assigned to various devices on a motherboard and the chipset brings extras additionally if a motherboard vendor wants to they could add their own third party solutions to the board additional chips to bring more IO so sometimes you'll see this with things like uh quania 10 gigb ethernet stuff like that so two things to pay attention to one's going to be the CPU one's the chipset and then as far as the new boards we're not getting any for launch so we don't know when exactly they're going to start being available but we're going to be using x670 for our reviews on July well towards the end of the month and otherwise this table simplifies everything and these x870 and x87 that will both run PCI Gen 5 graphics and nvme that is a hard requirement as we understand it that motherboard vendors will have to follow both will also support USB 4 that is another hard requirement CPU and memory overclocking are supported and they run pcie Gen 5 by 16 one of those for graphics or they can run two eight Lane configurations amd's x870 will use two chipset dies and it keeps the Dual chipset silicon layout of x670 the stands for extreme the X probably also stands for extreme anyway everything else uses a single chipset if it doesn't have an e at the end this allows one of the chipset dies to be closer to the pcie slots this can be useful and Trace routing it also just expands the general purpose PCI Lane count b850 drops the Gen 4 on the hard requirements for graphics but can use Gen 5 that's optional it also drops the USB 3.2 from USB 4 so that reduces down to a 20 G per second requirement from AMD and then b840 is effectively an A series chipset previously uh and it's just rebranded to either trick consumers intentionally or to just cause unnecessary confusion and havoc in the market this is a low-end chips set it cuts off at PCI E gen 3 it runs USB 3.2 10 GB per second so a huge drop there and it removes CPU OC support it also only has 1 by6 graphics slot so again as the primer for those of you who are newer to this you don't know how how it works basically the pcie slots on the motherboard things like SATA uh ethernet any of the additional IO nvme slots .2 all that stuff the board vendors can pick and choose how much of each they want within the uh limitations of the amount of pcie lanes they have available to them Intel has historically called them HS iio Lanes or highspeed IO kind of similar in a sense uh but you'll see a differing number of those IO options based on how they want utilize the lanes that are afforded by the chipset and the CPU combined so that's how that works now the primary difference between x870 x870 and the prior x670 and x670 uh the biggest one we think is usb4 support and then there are other meaningful changes like um availability of curve shaper for example we're not currently clear on if that's going to be added retroactively to all the x67 e boards or not uh in theory it's possible it's we're not sure if it's up to AMD via Aisa or if it's up to the board Partners uh so stuff like that isn't finalized yet as far as we're aware here's a table from AMD this is from their website so this shows things like general purpose pcie Lanes uh ryzen CPUs combinations with x870 will support up to 44 pcie Lanes as on this table against 36 total on x870 and both support up to 24 pcie 5.0 x670 the prior Flagship chipet also runs 44 pcie lanes and 24 up to PCI E Gen 5 total x670 non drops to 44 and8 per this table b850 and b840 are not on this table yet but we already went over the couple things that really matter for those so uh the biggest takeaway we would would think is b840 is probably not where you want to be looking for the vast majority of users and if it does sound like what you want it's going to be ultra budget stuff hopefully it better be real cheap compared to b850 because it's not a big price drop there it's really not worth it uh think of it as an A series chipset but that's going to be it for this recap there's a lot more to talk about we will save most of it for the reviews we have an interview with Mike Clark it's just kind of fun talking about some of the early days of ryzen uh similar to what we did with Amit previously in the AMD lab and that covers it for this one thanks for watching as always subscribe for more go to store. Gamers access.net or patreon.com Gamers andais to support us directly as we fund our own travel for these types of events we don't accept travel vouchers or paid hotels or flights or anything like that so uh thank you for your support enabling us to go out and report on these things and we'll see you all in the next videomdz 5 CVS will be launching on July 31st so this is a dedicated News segment with some architectural information a uh differences in comparison section on the chipsets that's x870 x870 b850 b840 against the prior chipsets we covered that during the Cy Tex announcement but now we have some more info so that's what we're going over here today uh amd's new features include on thefly memory tuning some memory changes from within Windows being supported without reboot now so that's kind of cool there's a new curve shaper we talked about that in our video from a couple days ago with Bill and omit going over the overclocking so you can learn about curve shaper in that one that builds on top of curve Optimizer there's the new chipsets there's the Zen 5 architecture itself and we'll cover the rest of the news for AMD Zen 5 lineup as we know it right now so all of this comes from a press conference that AMD held in Los Angeles as always we paid for all of our own flights uh travel Hotel housing staff obviously things like that so we flew out there on our own dollar thank you for the support and us to do that and collected all this information we put it together for you and then the reviews are coming up closer to that July 31st date uh but for now at least we can get into some of the architectural differences and some of the expectations for performance that AMD has set with its first party Benchmark so let's get into it before that this video is brought to you by thermal R and the Frozen prism 360 liquid cooler thermal R's Frozen prism is one of the most affordable liquid coolers on the market and is able to achieve competitive results with a high cold blate convexity that applies pressure centrally to the Silicon area based on our testing this this works on both AMD and Intel we previously benchmarked the Frozen prism and found that it's overall competitive for its price point the cooler comes in a few color variations it has a blackout option and an RGB option and it's the cheapest liquid cooler we've tested anytime recently that still hits performance markers learn more at the link in the description below so we'll get right into the quick facts first uh some of this was already covered at amd's compy Tex announcement but a lot of it's new information unfortunately the first thing everyone wants is price we don't have that yet that'll be closer to the July 3 first date now amd's ryzen 9000 Series Desktop uh CPUs are code named Granite Ridge and these feature the zen5 architecture they are still in the am5 socket so the motherboards can be the same uh and then they are launching soon now the first image will be a recap of things we already knew so that's the The Core specs of the CPUs that are currently known then that'll be followed by the new information so it's a recap for you all this shows the lineup is fundamentally identical to the initial ryzen 7000 series CPUs the flag ship R9 950x which was the one we overclocked or rather watched Bill overclock in the recent video has 16 cores it advertises a 5.7 GHz Max boost 80 megabytes of cache 170 wat TDP down from that is the R9 9900x with 12 cores slightly lower boost and cash and a 120 watt TDP then there's the 9700x that has eight cores it's got a 5.5 GHz Max boost a smaller 40 megab of cache and that is due to it being a single CCD and then it has a 65 wat TDP and finally there's the 6 core 9600 X which holds up the bottom of the stack notably the tdps for the bottom three are down versus their prior Ry in 7,000 counterparts as a reminder TDP doesn't equate the actual power consumption uh it's not always consistent across the same companies we asked about that get to that in a second uh and it is definitely not consistent across vendors or even across sockets and these pvt or package powert tracking would be the more reliable gu post for sort of power comparison numbers so uh the TDP formula is TDP equals T case minus t ambient divided by uh heat SN fan Theta CA I think is what it is so uh that is important that all those things are the same for the comparison to be like to like we asked AMD yes they are all the same metrics so uh the numbers that go into that formula for ryzen 7000 and ryzen 9000 should be like for like comparable in other words meaning heat sink fan Theta CA thermal resistance is the same that's the key number that one particularly mattered AMD advertised that for Zen 5 it has improved the thermal resistance they say by 15% Improvement in the Zen 5 solution for what they say is a 7 Dee reduction at equivalent TDP so we asked amd's people uh what exactly does that mean what was tuned how to improve and the answer we got was The Tuning was largely to sensor placement and optimization of how the temperature is being read there have been some other improvements as well as a result of the AR architectural changes maybe some voltage stuff but ultimately it comes down to sensor placement so in any given CPU there are multiple thermal sensors AMD Zen CPUs have hundreds of sensors for different things across the chips and changing the placement of them means that strictly like for like it's not identical but what they're trying to do is improve the boosting Headroom by getting sensors out of areas where it may be leading to uh an unoptimized temperature reading that is for example jumping in Gate the Boost in or thermally limit maybe more accurate say the boosting earlier in the pipeline so they're trying to get away from that so that means the T die performance should look better at least and may allow better boosting all right getting into the architecture stuff so AMD gave the press a deeper dive into the changes for Zen 5 it's stating that Zen 5 is it's sort of seing it as a place to grow from for Zen 6 and Zen 7 here's uh the beginning of that presentation and what you're going to see is it really represents a huge leap forward and in fact it's going to be a pedestal that we're going to build upon the next several generations of Zen in this presentation AMD said that it redesigned key elements of the front end including fetch decode and dispatch this gives more instructions to the back end every clock tick as Zen 5 has wider execution pipelines to execute the instructions AMD says that efficiency increases from improved cash with more bandwidth and an expanded execution window which the company States is intended to avoid execution stalls moving into more detail and starting on the front end with Pip fetch Branch prediction is lower latency more accurate and with more predictions per cycle in Zen 5 according to AMD this all adds up to more throughput in the front end downstreams N5 has dual ported instruction cach and op cash while decreasing the latency and the also added a dual decode path next is dispatch and the execution engine Z5 features 8 wide dispatch and retire six alus with three multiplies and a more unified ALU scheduler there used to be a unique schedule for each of the alus we then went uh you know from the the fact that we had uh these wider uh execution pipelines knowing that when you have uh more uh instructions that you're handling you have to think about handling misses uh effectively and keeping the performance those execution pipelines again hardcore microarchitecture engineering am the also expanded Zen 5's execution window by it says 40% with up to 448 supported Ops which AMD says is a significant driver of more performance Zen 5 also has a larger 48 kiloby data cache up from 32 kiloby on Zen 4 and double the maximum bandwidth to the L1 cache and floating Point Unit and improved data prefetch when you grow caches like that what typically happens uh is you run a high risk of increasing the latency you you gow the cash that's normally going to happen uh but what uh we did in this case uh Team just did a phenomenal job and so they maintained actually that four cycle access uh that that we had had despite the growth the 50% growth in the data cache with Zen 5 we can now execute four loads per cycle the final key Improvement AMD made regarding data bandwidth is to data prefetching where AMD says the tuned algorithms give more stride pattern recognition next are the floating point and vector unit enhancements these include a full 512-bit data path six pipelines with two cycle latency floating ad and a larger number of floating Point instructions in flight at one time so I talked about that 520 52 bit uh data path this is more important than ever because when you think about it uh there's been no reduction in the kind of math hungry work clads of gaming of HPC of content creation uh you know when so when you think about those users of of the math unit uh none of them are are going away but AI uh with with its need is now becoming a workload everywhere AMD so far has done AVX 512 by double pumping a 256bit pipeline which made sure that the CPU wouldn't have to drop clocks while doing AVX 512 workloads with 5 AMD engineered away to support full frequency while running the physical data path at true 512-bit our understanding is that this is modular to the extent that the older double pump approach is still possible in some situations if they want to build it that way Zen 5 they say also lowers the latency of floating Point operations from three Cycles to two so we doubled the physical pipeline we lowered the latency we've increased the throughput and that combined with the load store improvements that I described really create uh a super optimized engine across those workloads I described AI HBC gaming content creation all these improvements bundled together result in what AMD claims as a 16% average geoman uplift in IPC versus zen4 with up to 35% they say for single core uplift in AES XTS encryption the breakdown of Zen 5's uplift consists of data bandwidth Fetch and Branch prediction execution retire and decode and op cach improvements in a more physical sense Zen 5 Moves to 4 nanometer and 3 nanometer process technology uh this should enhance they say the metal stack for higher performance and lower resistance there's a change there as well AMD also shared some first-party performance claims so as always we'll kind of we'll go over a couple of these just to set the expectation and know what we're benchmarking against in terms of validating marketing but we're not going to go through all of them uh it is first party the numbers should therefore not be looked at as full truth and uh just view this as a way to set the expectations we'll have our own review for launch okay so the first set of tests were performed with matched clocks AMD says between a 9950 X and 7700x claimed IPC uplift ranged from up to 10% in Far Cry 6 to 23% in blender geekbench 5.4 was even higher though that seems like a potential outlier we would have preferred if these were done with CPS that were more comparable so at least the same ccds if not the same actual core count they lock the clock so that helps but AMD is basically asking us to give the benefit of the doubt that there is no Advantage from a physical Hardware difference between them uh beyond the architecture so anyway amd's had some shy history recently with some of its marketing slides like the Zen refresh stuff that they showed at computex where they chose a lower-end GPU to do a CPU Benchmark comparison didn't really make any sense but anyway moving on to and these competitive t in it matched up the 12 core 9900x versus Intel's 14900 K AMD claims a 41% Improvement or advantage in handbreak 22% in Horizon zero Dawn and 4% in Borderlands 3 and the also compared it's 9700x to the 14700 K citing a 19% advantage in Pug's Photoshop Benchmark that's when we run in our review so we'll check that and game benchmarks that range between 4% and 31% in the 9700 X's favor then finally finally moving to the 9600 X AMD matched it against the 14600 K there's a massive 94% win and handbreak along with a group of other productivity and gaming wins now interestingly AMD compared to its former am4 King the 5800 X 3D AMD is probably having some trouble getting people to migrate off that platform with how good that CPU was AMD ran the 9700x versus the 8 x3d where it claims an average 12% faster geom me that would be a huge efficient win as well in theory but we'll need to test it look at the power draw at the performance at the end of the architecture day discussion Andy had four of its fellows they're called on stage if you're not aware fellow is a common title in the industry it's reserved generally for very high ranking either engineer or management track people at companies in this instance uh this was the design and engineering team so the four Engineers included Mike Clark who's the Chief Architect we actually have a separate interview with him coming up soon uh he is regarded as they call him quote the father of Zen he has another nickname as well that we'll talk about in that interview and uh he is effectively the originator Will Harris is a platform engineer he knows the chipset in the socket mahash subon is a silicon design engineer and then Joe Macker is the Computing graphic CTO it was a generally technical if a bit top level discussion at times one of the early questions had to do with the fact that AMD is uh rolling out a heterogenous core in some of its products and so this was the S so discussion a lot of this stuff but there was a funny slip or maybe not in this section and see if you catch it mahash you know when we look at our competition Intel you know they have a performance core an economy core definitely some stifled laughs in the audience for that one I looked at vitalian I was like he did he say economy an economy core that's interesting uh anyway Intel calls it the efficient core but economy has kind of a different meaning behind it now uh here's another quote from AMD um you know we have heterogenous cores also our philosophy is different and how we approached desktop or mobile maybe you could you know dive in a little bit there and explain you know why two companies that are aiming at the same Market approach things just so differently it really is microarchitecture exact uh Isa exact an IPC exact module of the cach size it attaches to so the heterogenity if you will is really around the voltage frequency response so giving up some of that Peak um frequency Peak Performance and get some of that back in area and efficiency so um that's what the compact core does for us the the desktop user demands performance low latency and um throughput for every task they want to do so they are better served with a homogeneous you know classic core with a better um performance if you will on a voltage frequency response if you will Dynamic um and on on the mobile side even though they're not that far behind and they're computer requirements they care a lot about power efficiency and that's where the compact core kind of fits right in a right mix of of uh you know the classic and the compact course delivers that scalability in performance without compromising on the on the power efficiency amd's Macker added that since amd's compact cores are in essence the same as its regular cores it makes things easier from an OS or a software and scheduling perspective the corner cases that you experience when you got cores that are very separate in their in their attributes just you know confound the user Make That user experience more difficult make the OS Partners have a more difficult life in some ways interesting words from the company that shipped the 7950 x3d and the 79 100 x3d where these are CPUs with different performance characteristics that have uh ccds where they've got one with stacked vcash and lower frequency the other one without the cache but higher frequency there are some scheduling challenges there and those CPUs opened up a whole can of worms that in order to get the best performance in all circumstances they do require special drivers and even a little bit of user knowledge and intervention at setup um that we would classify as confounding so interesting choice of words they are not completely free from having some of the same considerations for users the big thing is as long as it's all communicated well so it matters uh most and then of course on the OS side all the scheduling does need to be taken care of Intel has struggled with that so fair point to AMD it's just they have also had some of those struggles in the past all right moving on MRE addressed Will Harris and brought up the am5 platform socket socket longevity and uh said that AMD intends for am5 to last up to seven years and they said four generations of CPU cores AMD later emailed us and said they did not intend to say four generations uh they intended to instead just give the the year marker and that was it so we don't know exactly what that means but it was a a misspeak in some capacity we'll see how that takes out in a few years I guess Harris responded saying this and so one of the first things that we do as we're uh designing a new infrastructure such as am4 am5 is we kind of tie it to a a major interface that's transitioning so uh in general is usually memory for example uh so am4 was tied with ddr4 and am5 was tied with ddr5 like you said we want that longevity so then we do things like uh making sure that we have sufficient interfaces to go uh for several Generations we we make sure that we've got the signal Integrity isolation on the pins on the package so that we can get a few speed bumps and improvement over time on like things like memory speeds or PCI Express speeds for example Harris also said that am the evaluat industry Trend standards committees thirdparty vendors to see where the market heading long term I asked uh Will Harris a little later in the event about socket longevity and the types of tradeoffs that might be made for something that is longer lasting and one of the key areas that Harris brought up actually a couple of them were one trying to align with Technologies like the the most recent DDR generation so five in this case uh aligning for pcie generations to try and catch those as they're new because they're going to be supported for a long life and making sure the pin count is appropriate so that AMD is able to work with all the pins it might want for such a a long lifespan other downsides would be if they want to do a massive change of any kind they're kind of restricted to the socket and the chipsets they've created and need to stick with it so anyway Mahesh from AMD jumped in and said that the generational gains in the same die area uh with them slowing down AMD has had to add die size in order to get more substantial gains in IPC and total performance so if the dieses get larger they still need to fit on the same physical package and that's a difficult challenge across multiple Generations you know the team has to dive in at the device physics level right the process technology as we shrink it you know voltages want to come down but the platform has to stay consistent and as AMD does uh they did take the opportunity to get in another shot at Intel fa you don't have to go change your motherboard every other generation like uh some other folks do do fair enough on that one AMD has done well am4 definitely has earned its legendary status for how long it's been relevant in getting new CPUs as long as AMD doesn't start doing the same thing as Intel at some point then that's a fair comment but we will remember that so if that ever changes AMD I'm going to dig this up even if it's in like 10 years from now play it back and be like hey remember that time just some encouragement to keep doing the right thing the conversation turned towards simultaneous multi-threading or smt addressing Intel leaving behind hyperthreading on the upcoming pees in lunar Lake I think as we talked about heterogen earlier you know with Intel having two core types one with smt and one without I can definitely see how that would be really hard to manage for software so I can't really comment more on on their design choices uh but that seems like an obvious one that that sticks out now again AMD 7950 x3d is staring us right in the face with some similar scheduling challenges but Clark continued addressing the actual topic at hand for us uh I mean smt is what is the best per per watt per area feature that we have and you know we've been implementation does matter too so you have to do it in a very smart way just like all the microarchitectural features you know Mark rolled out yesterday and so for us you know smts about a 5 to 10% area hit versus you know workload improvements that go from 20 to 50% Clark stated that smt doesn't work in every scenario and that if a workload is bandwidth intensive having more cores won't help more than having smt and you makes some processors with smt off and it allows the end user to of course turn it off they also briefly discussed the future Zen 6 and 7 CPUs but it was very limited mostly to the fact that am's making them and they also talked about how they view Zen 5 as sort of the launching point in a similar way to Zen one so it's almost like a reset for the platform for the architectures to Common 6 and 7 for the chipset comparison and differences we'll keep this as simple as possible cuz there's going be a lot of motherboards out there you can choose from as these Generations pile up so this will give you some tables to show the differences uh there are going to be four new sets in the immediate future there's x870 that's going to be a two die solution there's x870 b850 and b840 now the important thing to remember here for chipsets is that the chipset drives a lot of the io on the board but the CPU also has its own Lanes so the CPU has CPU Lanes other types of IO lanes that are assigned to various devices on a motherboard and the chipset brings extras additionally if a motherboard vendor wants to they could add their own third party solutions to the board additional chips to bring more IO so sometimes you'll see this with things like uh quania 10 gigb ethernet stuff like that so two things to pay attention to one's going to be the CPU one's the chipset and then as far as the new boards we're not getting any for launch so we don't know when exactly they're going to start being available but we're going to be using x670 for our reviews on July well towards the end of the month and otherwise this table simplifies everything and these x870 and x87 that will both run PCI Gen 5 graphics and nvme that is a hard requirement as we understand it that motherboard vendors will have to follow both will also support USB 4 that is another hard requirement CPU and memory overclocking are supported and they run pcie Gen 5 by 16 one of those for graphics or they can run two eight Lane configurations amd's x870 will use two chipset dies and it keeps the Dual chipset silicon layout of x670 the stands for extreme the X probably also stands for extreme anyway everything else uses a single chipset if it doesn't have an e at the end this allows one of the chipset dies to be closer to the pcie slots this can be useful and Trace routing it also just expands the general purpose PCI Lane count b850 drops the Gen 4 on the hard requirements for graphics but can use Gen 5 that's optional it also drops the USB 3.2 from USB 4 so that reduces down to a 20 G per second requirement from AMD and then b840 is effectively an A series chipset previously uh and it's just rebranded to either trick consumers intentionally or to just cause unnecessary confusion and havoc in the market this is a low-end chips set it cuts off at PCI E gen 3 it runs USB 3.2 10 GB per second so a huge drop there and it removes CPU OC support it also only has 1 by6 graphics slot so again as the primer for those of you who are newer to this you don't know how how it works basically the pcie slots on the motherboard things like SATA uh ethernet any of the additional IO nvme slots .2 all that stuff the board vendors can pick and choose how much of each they want within the uh limitations of the amount of pcie lanes they have available to them Intel has historically called them HS iio Lanes or highspeed IO kind of similar in a sense uh but you'll see a differing number of those IO options based on how they want utilize the lanes that are afforded by the chipset and the CPU combined so that's how that works now the primary difference between x870 x870 and the prior x670 and x670 uh the biggest one we think is usb4 support and then there are other meaningful changes like um availability of curve shaper for example we're not currently clear on if that's going to be added retroactively to all the x67 e boards or not uh in theory it's possible it's we're not sure if it's up to AMD via Aisa or if it's up to the board Partners uh so stuff like that isn't finalized yet as far as we're aware here's a table from AMD this is from their website so this shows things like general purpose pcie Lanes uh ryzen CPUs combinations with x870 will support up to 44 pcie Lanes as on this table against 36 total on x870 and both support up to 24 pcie 5.0 x670 the prior Flagship chipet also runs 44 pcie lanes and 24 up to PCI E Gen 5 total x670 non drops to 44 and8 per this table b850 and b840 are not on this table yet but we already went over the couple things that really matter for those so uh the biggest takeaway we would would think is b840 is probably not where you want to be looking for the vast majority of users and if it does sound like what you want it's going to be ultra budget stuff hopefully it better be real cheap compared to b850 because it's not a big price drop there it's really not worth it uh think of it as an A series chipset but that's going to be it for this recap there's a lot more to talk about we will save most of it for the reviews we have an interview with Mike Clark it's just kind of fun talking about some of the early days of ryzen uh similar to what we did with Amit previously in the AMD lab and that covers it for this one thanks for watching as always subscribe for more go to store. Gamers access.net or patreon.com Gamers andais to support us directly as we fund our own travel for these types of events we don't accept travel vouchers or paid hotels or flights or anything like that so uh thank you for your support enabling us to go out and report on these things and we'll see you all in the next video\n"